1/4 rev. a structure silicon monolithic integrated circuit product clock generator type BU3056FV feature to generate clocks for bd-player, bd-recorder system selection of pdb pin enabling power-down function absolute maximum ratings paramete r symbol ratings unit supply voltage vdd -0.3 4.0 v input voltage vin -0.3 vdd+0.3 v storage temperature range tstg -55 125 power dissipation pd 450 1 mw 1 a measure value at mounting on 70mm 70mm 1.6mm glass epoxy substrate. in the case of exceeding ta=25 , 4.5mw should be reduced per 1 . the radiation-resistance design is not carried out. operation is not guaranteed. operating conditions parameter symbol ratings unit supply voltage vdd 3.0 3.6 v input ?h? voltage vih 0.8vdd vdd v input ?l? voltage vil 0.0 0.2vdd v operating temperature topr -20 85 output load cl 15 (max) pf status of this document the japanese version of this docume nt is the formal specification. a customer may use this translation version only for a referenc e to help reading the formal version. if there are any differences in translation version of this document, formal version takes priority.
2/4 rev. a electrical characteristics vdd=3.3v,ta=25 ,at no load ,unless otherwise specified parameter symbol limit unit conditions min. typ. max. pull-up load rpu 28 59 90 k input pin pull-up load value pull-down load rpd 25 53 80 k input pin pull-down load value output h voltage voh 2.9 v ioh= 4.0ma output l voltage vol 0.4 v iol=4.0ma consumption current1 idd1 16 21 ma mode1=l, mode2=l, xtal=12.000mhz consumption current2 idd2 25 33 ma mode1=l, mode2=h, xtal=12.000mhz consumption current3 idd3 22 29 ma mode1=h, mode2=l, xtal=24.576mhz consumption current4 idd4 13 17 ma mode1=h, mode2=h, xtal=25.000mhz block diagram xout pdb pll2 xin clk0 clk1 clk2 mode1 mode2 pll1 logic output frequency mode1 mode2 pdb input frequency clk0 clk1 clk2 l l l 12.0000mhz l output l output l output h 12.0000mhz 12.0000mhz 33.3333mhz 27.0000mhz l h l 12.0000mhz l output l output l output h 12.0000mhz 12.0000mhz 60.0000mhz 48.0000mhz h l l 24.5760mhz l output l output l output h 24.5760mhz 24.5760mhz 25.0000mhz 48.0000mhz h h l 25.0000mhz l output l output l output h 25.0000mhz 25.0000mhz 25.0000mhz 25.0000mhz
3/4 rev. a package outline, appearance of marker ssop-b16 pin function pin no. pin name function pin no. pin name function 1 vdd0 power supply for clk0 output 9 mode2 mode control terminal 2 ( cmos input ) 2 vss0 gnd for clk0 output 10 mode1 mode control terminal 1 ( cmos input ) 3 clk0 clk0 output terminal 11 clk1 clk1 output terminal 4 avdd analog power supply 12 vss logic gnd 5 avss analog gnd 13 vdd logic power supply 6 xin crystal input terminal 14 clk2 clk2 output terminal 7 xout crystal output terminal 15 pdb power-down control terminal with pull-up resister 8 test test terminal is normally open with pull-down resister 16 test_b test terminal is normally open with pull-down resister cautions on use BU3056FV BU3056FV must be basically mounted on the board. (if it is not circuit board mounting, it can't sometimes get a character fully.) capacitors 0.1uf need to be placed between 1pin(vdd0) and 2pin(vss0), 4pin(avdd) and 5pin(avss), 13pin(vdd) and 12pin(vss). it is effective as an emi countermeas ure when the capacitor (less than 1 ? ) which puts ferrite beads in the starting point of the power supply supplied to the BU3056FV by a circuit board and which makes the power supply-gnd space have a requested high fre quency as to the bypass is inserted. for ics with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. therefore, give special co nsideration to power coupling capacitance, power wiring, width of ground wiring, and routing of wiring. 3056f lot no.
4/4 rev. a cautions on use common absolute maximum ratings an excess in the absolute maximum ratings, such as supply vo ltage, temperature range of operat ing conditions, etc., can break d own devices, thus making imposs ible to identify breaking mode such as a short circuit or an open circuit. if any special mode excee ding the absolute maximum ratings is assumed, consideration should be given to take physical safety measur es including the use of fuses, etc. operating conditions these conditions represent a range within which characteristics can be provided approximately as expected. the electrical chara cteristics are guaranteed under the conditions of each parameter. reverse connection of power supply connector the reverse connection of power supply connector can break down ics. take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the ic?s power supply terminal. power supply line design pcb pattern to provide low impedance for the wiring between the power supply and the gnd lines.in this regard, for the d igital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. for the gnd line, give considerat ion to design the patterns in a similar manner. furthermore, for all power supply terminals to ics, mount a capacitor between the power supply and the gnd terminal. at the sam e time, in order to use an electrolytic capacitor, t horoughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. gnd voltage make setting of the potential of the gnd terminal so that it will be maintained at the minimum in any operating state. furtherm ore, check to be sure no terminals are at a potential lower than the gnd voltage including an actual electric transient. short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters entering between te rminals or between the terminal and the p ower supply or the gnd terminal, the ics can break down. operation in strong electromagnetic field be noted that using ics in the strong electromagnetic field can malfunction them. inspection with set pcb on the inspection with the set pcb, if a capacitor is connected to a low-impedance ic terminal, the ic can suffer stress. there fore, be sure to discharge from the set pcb by each process. furthermore, in order to mount or dismount the set pcb to/from the jig for the i nspection process, be sure to turn off the power supply and then mount the set pcb to the jig. after the completion of the inspection, be sure to turn off the power supply and then dismount it from the jig. in additi on, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set pcb. input terminals in terms of the construction of ic, parasitic elements are inevitably formed in relation to potential. the operation of the par asitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the gnd respectively, so that any parasitic element will operate. furthermore, do not apply a voltage to the input terminals when no power supply voltage is appl ied to the ic. in addition, even if the power supply volt ag e is applied, apply to the input terminals a voltage lower than the power supply vo ltage or within the guaranteed value of electrical characteristics. ground wiring pattern if small-signal gnd and large-current gnd are provided, it will be recommended to separate the large-current gnd pattern from t he small-signal gnd pattern and establish a single ground at the refere nce point of the set pcb so that resistance to the wiring p attern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal gnd. pay attention not t o cause fluctuations in the gnd wiring pattern of external parts as well. external capacitor in order to use a ceramic capacitor as the external capacitor, determine the constant with c onsideration given to a degradation in the nominal capacitance due to dc bias and changes in the capacitance due to temperature, etc.
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